The present disclosure relates to non-planar semiconductor devices and, more particularly, to a semiconductor structure, which comprises monocrystalline semiconductor fins that are above a trench isolation region in a bulk semiconductor substrate and that can be incorporated into semiconductor device(s), and a method of forming the semiconductor structure.
Integrated circuit design decisions are often driven by device scalability, manufacturing efficiency and costs. For example, size scaling of a single-gate planar field effect transistor resulted in a smaller channel length and, unfortunately, the smaller channel length resulted in a corresponding increase in short channel effects and a decrease in drive current. In response, different types of multi-gate non-planar field effect transistors (MUGFETs), such as dual-gate non-planar FETs (also referred to herein as fin-type FETs (FINFETs)) and tri-gate non-planar FETs, comprising one or more semiconductor fins were developed in order to provide reduced-size field effect transistors, while simultaneously avoiding corresponding increases in short channel effects and decreases in drive current. Semiconductor fins for such MUGFETs are typically formed using semiconductor-on-insulator (SOI) wafers so that the insulator layer will provide electrical isolation between the semiconductor fins and the semiconductor substrate below. Unfortunately, the costs associated using SOI wafers can be relatively high, thereby limiting access to such advanced technologies. Therefore, there is a need in the art for a method of forming semiconductor fins for non-planar semiconductor device(s), such as MUGFETs, on a bulk semiconductor substrate to lower costs and, thereby lower the access threshold for such MUGFETS.